Fin field-effect transistors (FinFET) are multi-gate transistors where the conducting channel is wrapped around a thin piece of silicon, often referred to and configured as a “fin.” The dimensions of the fin structure determine the effective channel width of the transistor. Typically, the source, drain and gate are formed extending above the substrate.
FinFETs provide a promising candidate for small line width technology (e.g., approximately 22 nm and below) because of their excellent short channel effect control and scalability. To be advantageous for general purpose applications, it is desirable for FinFETS to have different threshold voltages (Vt) that can be used for different circuit functionalities. However, manufacturing FinFETs with different threshold voltages is difficult. Because the channel or “fin” is on the order of 30 nm, this dimension makes it almost impossible to adjust Vt by changing channel doping concentration.
One possible way to obtain FinFETS with different Vt is to utilize different gate stack materials in High-K-Metal-Gate FinFET technology. However, the use of multiple gate stack processes needed to produce FinFETS with different Vt is extremely complex and non-practical in the manufacturing process.
Another way to obtain different Vt is through body bias. For example, in a conventional surface channel nFET, negative body bias increases Vt while positive body bias lowers Vt. Positive body bias is seldom used in bulk surface channel technology due to its associated high leakage current. Dynamic-Threshold MOSFETS (DTMOS) utilizes positive body bias to dynamically lower Vt when a transistor is “on” in order to increase drive current.
For a conventional FinFET structure, no body contact is possible because the channel/fin is completely isolated by buried oxide (BOX) underneath the channel/fin. Others have proposed to introduce body contact to FinFET structures, however, these methods are either very complicated, non-practical in manufacturing, or the FinFET device characteristics are severely affected.
Accordingly, there is a need for an improved FinFET device and structure (and methods of manufacture) having a gate to body contact that lowers the Vt of the device (as compared to FinFET without gate to body contact).